A.C.A Important questions - 3rd Internals

The following questions may be considered important for the upcoming 3rd internals:
Chap 5 Bus Cache and Shared Memory

write a short note on IEEE future bus + Standards-5M
What is memory interleaving? explain the two interleaved memory organization-with m=2powa n w=2powb words/module-10M
with diagram explain the 8 way low order interleaving and pipelined access 8 consecutive words in a c-access memory also sketch timing chart indicating major n minor cycle time -10M
explain concepts of mem swapping in virtual hierarchy-5M

Chap 6 Pipelining and Super scalar Techniques

what is diff between synchronous & asynchronous pipeline model .Explain the reservation table of four stage linear pipeline with appropriate dia -8m
definer following terms w.r.t clock & timing control
Speedup factor
efficiency
clock skewing
3. Problems on linear pipeline processors -10m
4. Explain the different mechanism for instruction pipelining with appropriate
diagram-12m
Explain static scheduling for scheduling instruction through an instruction pipe
explain the two dynamic scheduling mechanism for scheduling instruction through an instruction pipeline-10m
with diagram explain branch history buffer and state transmission dia used in a dynamic branch prediction-10 m
with eg explain diff between CSA & CPA address .design a pipeline unit for a fixed point multiplication of 8 bit integers using CSA tree -10m
explain the block dia of pipelined floating point of MC68040 processor